Soft errors have a predominant role in the design of integrated electronic circuits. Modular Redundancy is a technique used to suppress the effects caused by soft error. In conventional Triple Modular Redundancy scheme, voter generates error if majority cannot be detected. Introducing approximations in the conventional schemes reduces the error probability. The book presents the design of approximate scheme for alleviating the soft error by combining Inexact Double Modular Redundancy and Approximate Triple Modular Redundancy. The Approximate TMR module overcomes this problem by mediating the output instead of generating error. The scheme is designed using Cadence EDA tool with 180nm technology. Parameter analysis revealed power of the approximate design is being reduced by 49.11% from the existing design.
| Autorius: | Kalaiselvi Sundaram, Vijeyakumar Krishnasamy Natarajan, Saravanakumar Natarajan, |
| Leidėjas: | LAP LAMBERT Academic Publishing |
| Išleidimo metai: | 2018 |
| Knygos puslapių skaičius: | 56 |
| ISBN-10: | 6139845653 |
| ISBN-13: | 9786139845651 |
| Formatas: | 220 x 150 x 4 mm. Knyga minkštu viršeliu |
| Kalba: | Anglų |
Parašykite atsiliepimą apie „Low Power CMOS Approximate Voting Architecture for Reliable Computing“
