This book presents models and procedures to design pipeline analog-to-digital converters, compensating for device inaccuracies, so that high-performance specs can be met within short design cycles. These models are capable of capturing and predicting the behavior of pipeline data converters within less than half-a-bit deviation, versus transistor-level simulations. As a result, far fewer model iterations are required across the design cycle. Models described in this book accurately predict transient behaviors, which are key to the performance of discrete-time systems and hence to the performance of pipeline data converters.
| Autorius: | Jesús Ruiz-Amaya, Ángel Rodríguez-Vázquez, Manuel Delgado-Restituto, |
| Leidėjas: | Springer New York |
| Išleidimo metai: | 2014 |
| Knygos puslapių skaičius: | 224 |
| ISBN-10: | 1489993185 |
| ISBN-13: | 9781489993182 |
| Formatas: | 235 x 155 x 13 mm. Knyga minkštu viršeliu |
| Kalba: | Anglų |
Parašykite atsiliepimą apie „Device-Level Modeling and Synthesis of High-Performance Pipeline ADCs“
