Creating Assertion-Based IP

-15% su kodu: ENG15
154,26 
Įprasta kaina: 181,48 
-15% su kodu: ENG15
Kupono kodas: ENG15
Akcija baigiasi: 2025-03-03
-15% su kodu: ENG15
154,26 
Įprasta kaina: 181,48 
-15% su kodu: ENG15
Kupono kodas: ENG15
Akcija baigiasi: 2025-03-03
-15% su kodu: ENG15
2025-02-28 181.4800 InStock
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Knygos aprašymas

Assertion-based IP is much more than a comprehensive set of related assertions. It is a full-fledged reusable and configurable transaction-level verification component, which is used to detect both interesting and incorrect behaviors. Upon detecting interesting or incorrect behavior, the assertion-based IP alerts other verification components within a simulation environment, which are responsible for taking appropriate action. The focus of this book is to bring the assertion discussion up to a higher level and introduce a process for creating effective, reusable, assertion-based IP, which easily integrates with the user¿s existing verification environment, in other words the testbench infrastructure. The guiding principles promoted in this book when creating an assertion-based IP monitor are: modularity¿assertion-based IP should have a clear separation between detection and action clarity¿assertion-based IP should be written initially focusing on capturing intent (versus optimizations) A unique feature of this book is the fully worked out, detailed examples. The concepts presented in the book are drawn from the authors¿ experience developing assertion-based IP, as well as general assertion-based techniques. Creating Assertion-Based IP is an important resource for design and verification engineers. From the Foreword: Creating Assertion-Based IP "¿reduces to process the creation of one of the most valuable kinds of VIP: assertion-based VIP¿This book will serve as a valuable reference for years to come." Andrew Piziali, Sr. Design Verification Engineer Co-Author, ESL Design and Verification: A Prescription for Electronic System Level Methodology Author, Functional Verification Coverage Measurement and Analysis

Informacija

Autorius: Adam C. Krolnik, Harry D. Foster,
Serija: Integrated Circuits and Systems
Leidėjas: Springer US
Išleidimo metai: 2010
Knygos puslapių skaičius: 336
ISBN-10: 1441942181
ISBN-13: 9781441942180
Formatas: 235 x 155 x 19 mm. Knyga minkštu viršeliu
Kalba: Anglų

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