Vijeyakumar Krishnasamy Natarajan

Rasta: 4
VLSI Architectures
-15% su kodu: ENG15
48,81 
57,42 
Išsiųsime per 11-15 d. d.
CMOS Area Efficient Approximate Arithmetic Architectures
-15% su kodu: ENG15
43,93 
51,68 
Išsiųsime per 11-15 d. d.
ASIC Implementation of Low Power FP-AU using Reversible Logic: Floating Point (FP)-Arithmetic Units (AU)
-15% su kodu: ENG15
43,93 
51,68 
Išsiųsime per 11-15 d. d.
Low Power CMOS Approximate Voting Architecture for Reliable Computing
-15% su kodu: ENG15
43,93 
51,68 
Išsiųsime per 11-15 d. d.
Rasta: 4