Igor L. Markov

Rasta: 9
Design, Analysis and Test of Logic Circuits Under Uncertainty
-15% su kodu: ENG15
143,97 
169,38 
Išsiųsime per 11-15 d. d.
Functional Design Errors in Digital Circuits: Diagnosis Correction and Repair
-15% su kodu: ENG15
215,97 
254,08 
Išsiųsime per 11-15 d. d.
Multi-Objective Optimization in Physical Synthesis of Integrated Circuits
-15% su kodu: ENG15
143,97 
169,38 
Išsiųsime per 11-15 d. d.
Multi-Objective Optimization in Physical Synthesis of Integrated Circuits
-15% su kodu: ENG15
143,97 
169,38 
Išsiųsime per 11-15 d. d.
VLSI Physical Design: From Graph Partitioning to Timing Closure
-15% su kodu: ENG15
112,18 
131,98 
Išsiųsime per 11-15 d. d.
Design, Analysis and Test of Logic Circuits Under Uncertainty
-15% su kodu: ENG15
143,97 
169,38 
Išsiųsime per 11-15 d. d.
Quantum Circuit Simulation
-15% su kodu: ENG15
143,97 
169,38 
Išsiųsime per 11-15 d. d.
VLSI Physical Design: From Graph Partitioning to Timing Closure
-15% su kodu: ENG15
119,20 
140,23 
Išsiųsime per 11-15 d. d.
VLSI Physical Design: From Graph Partitioning to Timing Closure
-15% su kodu: ENG15
84,13 
98,98 
Išsiųsime per 11-15 d. d.
Rasta: 9